I write a Makefile like this:
all:
@echo $(wildcard $(include)/*.sh)
@echo $(include)
.PHONY:all
I input make "include=~" and output is
/home/ubuntu/caps_esc.sh /home/ubuntu/ss.sh
/home/ubuntu
But when inputing make "include=~ "(note the white space!) the output is
/home/ubuntu
/home/ubuntu
which means that the variable include is ~ plus white space. So my question is, How Makefile split string into individual words?